![A 2.4 mW 2.5 GHz multi-phase clock generator with duty cycle imbalance correction in 0.13 µm CMOS - ScienceDirect A 2.4 mW 2.5 GHz multi-phase clock generator with duty cycle imbalance correction in 0.13 µm CMOS - ScienceDirect](https://ars.els-cdn.com/content/image/1-s2.0-S0167926017307459-gr2.jpg)
A 2.4 mW 2.5 GHz multi-phase clock generator with duty cycle imbalance correction in 0.13 µm CMOS - ScienceDirect
![Electronics | Free Full-Text | An N/M-Ratio All-Digital Clock Generator with a Pseudo-NMOS Comparator-Based Programmable Divider Electronics | Free Full-Text | An N/M-Ratio All-Digital Clock Generator with a Pseudo-NMOS Comparator-Based Programmable Divider](https://www.mdpi.com/electronics/electronics-11-00261/article_deploy/html/images/electronics-11-00261-g001.png)
Electronics | Free Full-Text | An N/M-Ratio All-Digital Clock Generator with a Pseudo-NMOS Comparator-Based Programmable Divider
![Electronics | Free Full-Text | A 500 kHz to 150 MHz Multi-Output Clock Generator Using Analog PLL and Open-Loop Fractional Divider with 0.13 μm CMOS Electronics | Free Full-Text | A 500 kHz to 150 MHz Multi-Output Clock Generator Using Analog PLL and Open-Loop Fractional Divider with 0.13 μm CMOS](https://www.mdpi.com/electronics/electronics-11-02347/article_deploy/html/images/electronics-11-02347-g003.png)
Electronics | Free Full-Text | A 500 kHz to 150 MHz Multi-Output Clock Generator Using Analog PLL and Open-Loop Fractional Divider with 0.13 μm CMOS
![a) Schematic of the complementary clock generator. (b)–(d) Simulation... | Download Scientific Diagram a) Schematic of the complementary clock generator. (b)–(d) Simulation... | Download Scientific Diagram](https://www.researchgate.net/publication/261028534/figure/fig8/AS:296769314410498@1447766726276/a-Schematic-of-the-complementary-clock-generator-b-d-Simulation-results-showing.png)
a) Schematic of the complementary clock generator. (b)–(d) Simulation... | Download Scientific Diagram
![Figure 1 from Non Overlapping Clock generator for switched capacitor circuits in Bio-Medical applications | Semantic Scholar Figure 1 from Non Overlapping Clock generator for switched capacitor circuits in Bio-Medical applications | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/6fb45e288bc1c0aa6f0d4c4f50f38ba08aee29cf/2-Figure1-1.png)
Figure 1 from Non Overlapping Clock generator for switched capacitor circuits in Bio-Medical applications | Semantic Scholar
![Electronics | Free Full-Text | An N/M-Ratio All-Digital Clock Generator with a Pseudo-NMOS Comparator-Based Programmable Divider Electronics | Free Full-Text | An N/M-Ratio All-Digital Clock Generator with a Pseudo-NMOS Comparator-Based Programmable Divider](https://pub.mdpi-res.com/electronics/electronics-11-00261/article_deploy/html/images/electronics-11-00261-g006.png?1642158313)